Technical Staff Engineer - Verification

This Senior Verification Engineer position focuses on ensuring the quality and functionality of highly secure, low-power FPGA products through comprehensive verification of complex subsystems and complete systems-on-chip. The role spans multiple verification methodologies including constrained random testing, formal verification, and C-based approaches, while also exploring cutting-edge AI/ML-driven verification techniques. The engineer will develop and maintain reusable UVM-based verification environments, work across RTL through gate-level verification stages, and coordinate with emulation, hardware prototyping, and design architecture teams. This position suits experienced verification professionals with deep SoC knowledge who want to impact next-generation semiconductor products while mentoring emerging talent and advancing verification methodology innovation at a global technology leader.