Principal Engineer – Physical Design

This engineer will contribute to Microchip’s CAD Physical Design organization, driving physical implementation for hierarchical, low-power, multi-mode, multi-corner mixed-signal chips. Responsibilities span planning, placement, clocking, routing, signal integrity, timing closure, and sign-off verification. The position requires ownership of full-chip design activities and strong command of modern place-and-route, extraction, equivalence, power integrity, and physical verification tools. It suits an experienced VLSI physical design leader who can script in Tcl and Perl, troubleshoot complex implementation issues, and work effectively across geographically distributed teams. Experience with 40nm or 28nm processes is essential, while more advanced nodes and tools such as ICC2 or Innovus are advantageous.