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Ph.D. Intern - AI/ML & Design Automation
This internship offers two paths: using AI/ML to improve chip design and verification, or building enterprise LLM and agentic tools for Marvell’s engineering organization. Hardware-track projects may involve placement, routing, timing, power, predictive modeling, and EDA automation for advanced-node silicon, while enterprise-track work may include RAG, model integration, agent orchestration, evaluation, and responsible deployment. The role is embedded in active production efforts, allowing doctoral researchers to connect academic work with real semiconductor and engineering challenges. Candidates should be hands-on practitioners who can build reliable ML systems, conduct rigorous experiments, and communicate findings to both technical researchers and engineering stakeholders. It is well suited to Ph.D. students in AI, machine learning, computer science, electrical engineering, data science, or related disciplines who want applied research experience at an industry scale.
Requirements
Listed September 11, 2026 · Verify details with the employer before applying.
About Marvell Technology
Fabless semiconductor/chip design company (data infrastructure, custom silicon) with an office in Chandler.