Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions

This engineer will own verification environments and plans for complex FPGA designs, including cryptographic engines, interfaces, and system integration components. They will create constrained-random tests, coverage models, assertions, regression systems, and CI/CD workflows, while investigating failures through simulation and waveform analysis. The position works closely with FPGA designers on architecture, specifications, observability, and verification closure, and may support formal verification and mentor less experienced engineers. It suits an experienced hardware verification professional who is comfortable with SystemVerilog, VHDL, UVM, industry simulation tools, and coverage analysis. Experience with cryptographic hardware, FPGA tooling, automation scripts, bus protocols, and CDC analysis would be advantageous, along with eligibility for U.S. defense work.