Senior DFT Logic Design Engineer

This engineer will help Intel Foundry customers use PDKs, DFT/DFM flows, and ATPG validation processes across block-level and full-chip designs. The position works closely with Intel teams, customer design organizations, IP suppliers, and EDA vendors to resolve implementation issues and improve design quality. Responsibilities include developing methodologies and documentation, creating application content, delivering technical presentations, and supporting customer tape-outs. The role is part of Intel’s Aerospace, Defense, and Government organization and contributes to semiconductor solutions for sensitive government-related applications. It suits an experienced ASIC or semiconductor design professional with strong DFT expertise, scripting ability, customer-facing communication skills, and eligibility for US government work requirements.