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Ph.D. Intern - Advanced Packaging & Physical Integration
This intern will join Marvell’s advanced packaging team, supporting package design and analysis for custom XPUs, AI platforms, and high-bandwidth connectivity products. Responsibilities include evaluating signal and power integrity, modeling thermal and mechanical behavior, contributing to substrate and interposer layouts, and helping integrate chiplets, HBM, and potentially co-packaged optics. The role involves using tools such as Ansys or Cadence Sigrity and validating simulations through collaboration with chip design, assembly, test, and manufacturing teams. It is well suited to a doctoral student in electrical engineering, materials science, mechanical engineering, or a related discipline whose research involves semiconductor packaging, high-speed interconnects, thermal engineering, or heterogeneous integration. Candidates should be comfortable interpreting technical results, making design recommendations, and presenting their work to engineering stakeholders.
Requirements
Listed September 11, 2026 · Verify details with the employer before applying.
About Marvell Technology
Fabless semiconductor/chip design company (data infrastructure, custom silicon) with an office in Chandler.