Principal Engineer - Standard Cell Design

This engineer will define library content and strategy, develop innovative sequential and clocking circuits, and optimize standard-cell solutions across Intel’s leading process nodes. The position works closely with foundry customers, process technology teams, product designers, DTCO groups, and EDA partners to close technology gaps and deliver scalable libraries. It also includes analyzing silicon and design data, improving characterization and validation methods, and resolving complex PPA and variability challenges. As a senior technical leader, the engineer will mentor designers, lead working groups, and help establish future circuit and library directions. The role suits an experienced semiconductor professional with deep transistor-level design expertise, strong communication skills, and a record of leading advanced foundation-IP or technology co-optimization work.