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Facility VDC/BIM Engineer - New Fab Design
This engineer will lead VDC/BIM coordination for new fab planning and construction, working closely with trade contractors, design partners, and TSMC engineering teams. Responsibilities include maintaining accurate 3D models, overseeing facility-system space management, checking compliance with TSMC layout requirements, and developing solutions to model or design clashes. The position involves using tools such as Revit, AutoCAD, Navisworks, and potentially Dynamo to support coordinated design releases. It suits an architectural or mechanical engineering professional with design, piping, building, BIM, or construction-site experience. Strong communication, troubleshooting, presentation, and English-language skills are important, while Mandarin proficiency and semiconductor-facility experience are advantageous.
Requirements
Listed July 31, 2026 · Verify details with the employer before applying.
About TSMC Arizona
TSMC's planned $265 billion North Phoenix semiconductor campus is the largest foreign direct investment commitment in a greenfield project in U.S. history and anchors advanced AI chipmaking.
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