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An independent guide to Arizona’s AI economyData refreshed daily · Aug 12, 2026
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Senior Digital Verification Engineer

NXP SemiconductorsChandler, AZ

This engineer will work within NXP’s Advanced Power Systems organization to ensure PMIC digital designs meet functional, quality, reliability, and compliance objectives. Responsibilities span architecture and requirements reviews, verification strategy, SystemVerilog/UVM environment development, constrained-random testing, assertions, formal analysis, regressions, and coverage reporting. The role also addresses power sequencing, diagnostics, telemetry, fault handling, communications, and embedded control features. It is suited to an experienced semiconductor verification professional who can lead projects, improve verification methodologies, mentor junior engineers, and collaborate with globally distributed design and systems teams. Candidates should bring strong digital design knowledge, advanced verification expertise, automation skills, and preferably familiarity with PMICs, low-power verification, and industry communication protocols.

Requirements

BSEE with 8+ years, MSEE with 5+ years, or PhD with 3+ years of semiconductor experienceExpertise in Verilog, SystemVerilog, UVM/OVM, and class-based verificationExperience with constrained-random, coverage-driven verification, regressions, and signoffHands-on development of testbenches, verification IP, scoreboards, monitors, drivers, and assertionsKnowledge of SVA, formal verification, low-power methodologies, and protocols such as AMBA, I²C, SPI, CAN, or PCIeProficiency in Python, Perl, and UNIX/Linux scripting, with strong leadership and debugging skills
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Listed August 12, 2026 · Verify details with the employer before applying.

About NXP Semiconductors

Semiconductor manufacturer operating two wafer fabs in Chandler, including a GaN RF power fab opened 2020. Used in 5G base stations among many other applications.