Digital Physical Design (P&R) Intern

The intern will join an experienced physical design team focused on digital backend implementation. Responsibilities include learning the existing synthesis-to-GDSII flow, managing parallel tool runs, and comparing RTL or tool configurations to identify area-efficient results. The role also involves reviewing Cadence documentation and proposing enhancements to scripts and methodologies. It is suited to a master's student in electrical engineering with coursework in digital design, RTL, or physical design who enjoys analytical problem-solving and collaborative engineering. The intern must be able to relocate to the Phoenix metropolitan area and work onsite in Chandler at least three full days each week.