Principal Engineer

This engineer develops verification strategies and infrastructure for ASIC and mixed-signal designs, including testbenches, monitors, checkers, assertions, and regression suites. They work with design leads to translate IP and device specifications into test plans, execute digital and top-level simulations, and investigate failures. The position also involves tracking defects, recommending fixes, supporting resolution, and presenting verification results during design reviews. It suits an experienced semiconductor verification professional with strong SystemVerilog, UVM, SoC, processor, and serial-interface expertise. The role requires an engineering degree and at least five years of progressive post-baccalaureate experience in verification, design, or a closely related discipline.