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Updated twice daily · Oct 15, 2026
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Senior PCB Layout Engineer

ArmChandler, AZ

This engineer will create and finalize complex multilayer and HDI PCB designs for sophisticated compute platforms used by internal teams and external partners. The work spans mechanical and thermal constraints, component footprints and placement, power distribution, high-speed signal routing, manufacturing documentation, and design-for-manufacturing considerations. The position sits within Arm’s Hardware Platforms organization and partners closely with hardware design, chip packaging, SoC implementation, board fabricators, and contract manufacturers. It suits an experienced PCB specialist who understands signal and power integrity, dense SoC escape routing, fabrication standards, and production requirements. Strong Cadence OrCAD CIS and Allegro experience, technical communication skills, and the ability to advise teams on stackups, pinouts, and routing tradeoffs are important.

Requirements

Complex impedance-controlled multilayer and HDI PCB design experienceExperience with high-pin-count SoCs or FPGAs, PCIe, DDR, differential pairs, and high-current PDNsKnowledge of chip packaging collaboration, pinout planning, escape routing, and layer tradeoffsUnderstanding of signal integrity, power integrity, PCB fabrication, IPC standards, and stackupsProficiency with Cadence OrCAD CIS and Allegro PCBExperience supporting DFM/DFT with PCB fabricators and contract manufacturers
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Listed October 9, 2026 · Verify details with the employer before applying.

About Arm

Arm says it licenses semiconductor IP and that its Chandler office, recently expanded, develops CPU IP and runs a post-silicon characterization lab.

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