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Senior PDK Reliability Engineer
This engineer will help build the reliability design-enablement platform used by Intel and foundry customers across silicon and package technologies. Responsibilities include creating and validating PDK rules and materials, enabling EDA tools and methodologies, and assessing reliability risks in IP and SoC designs. The position works closely with technology, design, quality, and external EDA partners to deliver competitive reliability solutions and improve development processes. It is well suited to an experienced semiconductor engineer with expertise in PDKs, reliability verification, design flows, and cross-functional program execution. Strong communication, attention to detail, adaptability, and the ability to work across diverse teams are important for success.
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Listed September 23, 2026 · Verify details with the employer before applying.
About Intel
Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.