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Updated daily · Sep 25, 2026
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Senior PDK Reliability Engineer

IntelPhoenix, AZ$173,660.00-$245,160.00 USD annually

This engineer will help build the reliability design-enablement platform used by Intel and foundry customers across silicon and package technologies. Responsibilities include creating and validating PDK rules and materials, enabling EDA tools and methodologies, and assessing reliability risks in IP and SoC designs. The position works closely with technology, design, quality, and external EDA partners to deliver competitive reliability solutions and improve development processes. It is well suited to an experienced semiconductor engineer with expertise in PDKs, reliability verification, design flows, and cross-functional program execution. Strong communication, attention to detail, adaptability, and the ability to work across diverse teams are important for success.

Requirements

Bachelor’s degree with 6+ years of relevant experienceor a master’s with 4+ yearsor a PhD with 2+ yearsAt least 3 years of experience in PDK developmentreliability flowsdesign-for-reliabilityor related validationHands-on knowledge of PDK fundamentalsreliability rulesand their implementation in tools and flowsExperience with reliability mechanisms such as BTIHCIelectromigrationhigh-voltage designEOSor ESDProgramming or scripting ability for rule generationtechfile developmentor quality assuranceStrong communicationstakeholder managementteamworkand project leadership skills
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Listed September 23, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.

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