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Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)
This engineer will contribute across the ASIC and FPGA life cycle, including requirements analysis, micro-architecture, HDL coding, simulation, synthesis, place-and-route, timing analysis, and hardware bring-up. The position works within a cross-functional engineering organization and may guide technical tasks, support junior engineers, and collaborate with project teams and customers. Strong expertise in VHDL or Verilog, scripting, asynchronous design, constraints, and digital verification is central to the role. Experience with Xilinx or Microchip devices, industry verification environments, and laboratory debug equipment is advantageous. It suits an experienced hardware designer who can work independently, communicate clearly, and contribute to high-reliability mission systems while pursuing or maintaining the required clearance.
Requirements
Listed June 8, 2026 · Verify details with the employer before applying.
About General Dynamics Mission Systems (GDMS)
Scottsdale campus develops advanced communications, cyber, and mission-critical electronics for defense and space programs.
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