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Senior Staff Collateral Design and DFM Engineer

IntelPhoenix, AZFull-time$161,550.00-317,600.00 USD

This role focuses on advancing DFM practices within Intel's Manufacturing Development Customer Engineering organization, which bridges the gap between initial technology development and high-volume production. You will lead cross-functional technical teams to define and continuously enhance design rules, yield tools, and DFM processes that drive measurable improvements in manufacturing performance and speed. The position requires deep expertise in advanced node technologies (3nm and below), test chip design, and the ability to translate silicon insights into actionable design guidance for both internal teams and external foundry customers. This role suits experienced semiconductor engineers with strong foundry backgrounds who excel at cross-functional collaboration, have hands-on experience with cutting-edge technology nodes, and are passionate about solving complex manufacturing challenges at scale.

Requirements

Master's degree in Electrical Engineering, Physics, or related field6+ years of DTCO and/or DFM experience in semiconductor foundry or advanced technology developmentExpertise in DTCO methodologies including SRAM and Standard Cell designHands-on experience with advanced node test chip design and scribe line optimization at 3nm-16nm FinFET or sub-3nm GAA technologiesDemonstrated ability to lead cross-functional teams in defining design rules and device architecturesStrong communication skills with ability to manage multiple concurrent projects in fast-paced environment
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Listed June 30, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.