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Physical Verification Engineer

IntelFull-time$128,880.00-$245,160.00 USD

The Physical Verification Engineer serves as a specialized technical expert supporting Intel Foundry Services customers in the aerospace, defense, and government sector. The role combines hands-on troubleshooting of layout verification and parasitic extraction challenges with strategic responsibility for improving design kits, documentation, and verification flows. Working within Intel's Central Engineering Group, the engineer collaborates across internal teams and external partners including foundry customers and EDA vendors to ensure successful design tape-outs. This position suits experienced engineers with deep expertise in advanced CMOS processes, EDA tools, and scripting who excel at both technical problem-solving and customer-facing communication. The role offers significant impact potential, directly contributing to national security applications through cutting-edge semiconductor verification methodologies.

Requirements

3+ years experience with advanced CMOS processes (22nm and below)3+ years combined experience in layout verification and parasitic extraction EDA tools3+ years experience with Python, Perl, Tcl, or shell scriptingBachelor's degree in Electrical Engineering, Computer Science, or STEM fieldUS Citizenship and ability to obtain US Government Security ClearanceHands-on experience with DRC, LVS, ERC, or PERC tools preferred
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Listed June 30, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.