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Updated daily · Sep 13, 2026
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Physical Verification Engineer

IntelPhoenix, AZFull-time$128,880.00-$245,160.00 USD

This engineer will support foundry customers through complex DRC, LVS, ERC, PERC, and parasitic extraction issues, working closely with Intel teams, IP providers, and EDA vendors. The position sits within Intel Foundry’s engineering organization and focuses on enabling successful tape-outs for advanced process technologies at 22nm and below. Responsibilities include improving verification methodologies, developing documentation and training, and enhancing design kits and customer workflows. The role suits an experienced physical verification professional who enjoys solving difficult technical problems and communicating directly with customers. US citizenship and the ability to obtain a government security clearance are required, with experience in relevant EDA tools and scripting strongly preferred.

Requirements

3+ years experience with advanced CMOS processes (22nm and below)3+ years combined experience in layout verification and parasitic extraction EDA tools3+ years experience with Python, Perl, Tcl, or shell scriptingBachelor's degree in Electrical Engineering, Computer Science, or STEM fieldUS Citizenship and ability to obtain US Government Security ClearanceHands-on experience with DRC, LVS, ERC, or PERC tools preferred
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Listed June 30, 2026 · Verify details with the employer before applying.

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Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.

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