Principal Analog Circuit Design Engineer - SerDes

This engineer will drive architecture, implementation, and validation of high-speed SerDes analog blocks in advanced FinFET CMOS technologies. The work may include PLLs, CDRs, equalizers, ADCs, and transmitter or receiver circuits, along with lab bring-up and post-silicon debugging. The position sits within Intel’s Central Engineering Group and involves close collaboration with systems, digital, layout, and test teams. It suits an experienced analog or mixed-signal designer who can lead technical decisions, communicate complex results clearly, and deliver reliably in fast-paced programs. A strong candidate will also enjoy mentoring engineers and contributing to system-level link performance and next-generation communication standards.