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IP Design Verification Engineer

IntelFull-time$141,910.00-$200,340.00 USD

This position involves designing and executing verification strategies for Intel's mixed-signal semiconductor components, working with advanced methodologies like UVM to create test environments and validate analog and digital behavior. The engineer will identify and debug design issues, analyze coverage metrics, and collaborate with cross-functional teams to refine verification approaches and optimize chip designs. The role suits experienced verification professionals with strong backgrounds in both analog and digital domains who are comfortable working on complex, mission-critical semiconductor projects and can operate effectively in a collaborative, fast-paced environment.

Requirements

Bachelor's degree in Electrical/Computer Engineering with 4+ years experience, or Master's with 3+ years, or PhD3+ years with SystemVerilog, Verilog, UVM, and OVM methodologiesExperience with EDA tools: Synopsys VCS, Cadence Xcelium/JasperGold, or Mentor QuestaProficiency in analog behavioral modeling, high-speed IO IP verification, or low-power validationStrong debugging skills across analog and digital domainsKnowledge of PCIe and/or UCIe protocols and test planning
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Listed June 30, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.