Open role
Design Automation Engineer (TFM/EDA)
This engineer will maintain and improve the software, methodology, licensing, and computing environments used for front-end and back-end chip design. They will troubleshoot tool and flow problems, support Intel PDK collateral, train designers, and develop scripts that make environment deployment and design work more reliable. The position involves coordinating with EDA vendors, PDK and library specialists, flow developers, product designers, and computing infrastructure teams. It is suited to an experienced design automation professional who understands physical design workflows, Linux-based environments, scripting, and EDA tool integration. U.S. citizenship and eligibility for a TS/SCI government clearance are required, with locations in California, Arizona, or Oregon under a hybrid work model.
Requirements
Listed July 31, 2026 · Verify details with the employer before applying.
About Intel
Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.
More roles at Intel
- Senior DFT Logic Design EngineerPhoenix, AZ
- Software Engineer – DatacenterPhoenix, AZ
- FSMS Systems AnalystPhoenix, AZ
- Packaging Technology Development Graduate InternPhoenix, AZ
- Senior Accounting ManagerPhoenix, AZ