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Principal Engineer, AMS IP Architecture

IntelPhoenix, AZFull-time$220,920 - $311,890 USD

The Principal Engineer in AMS IP Architecture leads the design and development of analog and mixed-signal IP blocks that power Intel's portfolio of processors and connectivity solutions. The role spans multiple technical areas including SerDes modeling, DSP algorithm development for equalization and calibration, silicon validation, and cross-functional collaboration with analog, digital, and hardware engineering teams. You'll work on cutting-edge challenges like 100+Gbps link design, developing real-time adaptation algorithms, and ensuring simulation models accurately reflect silicon behavior. This position suits experienced engineers with deep expertise in high-speed communications, signal processing, or analog CMOS design who enjoy bridging theory with real-world silicon validation and solving complex technical problems across the chip development lifecycle.

Requirements

M.Sc. or Ph.D. in Electrical Engineering or related field with focus on high-speed communications or signal processingExpert-level SerDes modeling in MATLAB/Simulink, high-speed analog CMOS design, or DSP techniques for equalizationHands-on experience with SerDes architectures, equalization methods (FFE, DFE, CTLE), and link budget analysis at 100+GbpsProven ability to correlate behavioral models with silicon measurements and systematically debug discrepanciesKnowledge of CDR loop dynamics, jitter tolerance, and communications theory including equalization and codingProficiency in C, Verilog-A, or SystemVerilog for algorithm prototyping (preferred)
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Listed July 16, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.