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Principal Engineer, AMS IP Architecture
This engineer will shape AMS IP solutions for applications ranging from high-performance computing to low-power products, optimizing trade-offs among performance, energy use, and die area. Key work includes building PCIe SerDes models, assessing high-speed link margins, developing equalization and adaptation algorithms, and validating designs against silicon data. The position works closely with analog, digital, hardware, and laboratory teams to resolve implementation and measurement issues. It may also involve evaluating emerging protocols, supporting customer-specific channel analyses, and guiding system-level feasibility decisions. The role suits a senior technical leader with advanced training and deep experience in SerDes, high-speed analog design, signal processing, or communications theory.
Requirements
Listed July 16, 2026 · Verify details with the employer before applying.
About Intel
Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.