Mixed Signal Logic Design Engineer

This engineer will define logic architecture and microarchitecture, implement sophisticated RTL blocks, and model analog or mixed-signal circuits in SystemVerilog. The position works closely with verification, physical design, pre-silicon, and post-silicon teams to validate functionality, improve quality, and resolve implementation or silicon issues. Responsibilities include simulation, AMS analysis, lint and CDC checks, synthesis support, timing closure, and development of verification materials. The role sits within Intel’s Central Engineering Group, which delivers reusable IP, tools, and scalable solutions for product and foundry organizations. It suits an experienced electrical or computer engineer who can work independently, mentor others, and apply both digital design and mixed-signal expertise to high-speed interface technologies.