An independent guide to Arizona’s AI economyData refreshed daily · Jul 31, 2026
All open roles

Open role

Mixed Signal Logic Design Engineer

IntelPhoenix, AZFull-time$141,910.00-200,340.00 USD

This role focuses on architecting and implementing mixed-signal logic designs that integrate functional units into complete chip systems at Intel. You'll develop RTL specifications, create behavioral models for analog circuits using SystemVerilog, run simulations, and work across pre-silicon validation and post-silicon teams to ensure design quality. The position suits experienced engineers who are comfortable working independently, can mentor junior designers, and have deep expertise in digital design, computer architecture, and mixed-signal concepts. You'll support the full design lifecycle from synthesis through timing closure and physical implementation, while leveraging industry-standard tools and emerging AI capabilities to drive productivity.

Requirements

BS in EE/CE with 4+ years relevant experience or MS with 3+ years3+ years with SystemVerilog and digital design concepts like FSM3+ years with computer architecture, analog design, ADC/DAC, or microarchitecture3+ years experience with multiple clock-domain designStrong analytical debugging and independent problem-solving skillsExperience with mixed-signal validation, behavioral modeling, and RTL quality tools
Apply for this role

Listed June 30, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.