An independent guide to Arizona’s AI economyData refreshed daily · Jul 31, 2026
All open roles

Open role

Foveros Direct Pathfinding Integration

IntelPhoenix, AZFull-time$141,910.00-$269,100.00 USD

As a packaging engineer, you will lead the full lifecycle of semiconductor packaging development from concept through manufacturing, applying materials science and engineering principles to create innovative solutions for Intel's advanced chip packaging needs. You'll manage cross-functional initiatives spanning artwork design, prototype development, qualification testing, and supply chain optimization while collaborating with manufacturing, regulatory, logistics, and marketing teams. The role requires deep expertise in thermal and mechanical design for semiconductor applications, with particular emphasis on advanced packaging technologies like hybrid bonding. This position suits experienced engineers with strong backgrounds in materials science or packaging engineering who thrive in complex, collaborative environments and want to drive innovation in semiconductor manufacturing.

Requirements

Bachelor's degree in engineering or related field with 6+ years experience, or Master's degree with 4+ years, or PhD with 4+ yearsProven experience in semiconductor packaging engineering and thermal/mechanical design conceptsExpertise in qualification testing, specification documentation, and material certificationExperience with advanced packaging technology development and strategic supplier managementHybrid bonding process development or integration experience preferredStrong cross-functional collaboration skills with ability to engage stakeholders across product, manufacturing, and supply chain functions
Apply for this role

Listed June 30, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.