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Foveros Direct Pathfinding Integration
As a packaging engineer, you will lead the full lifecycle of semiconductor packaging development from concept through manufacturing, applying materials science and engineering principles to create innovative solutions for Intel's advanced chip packaging needs. You'll manage cross-functional initiatives spanning artwork design, prototype development, qualification testing, and supply chain optimization while collaborating with manufacturing, regulatory, logistics, and marketing teams. The role requires deep expertise in thermal and mechanical design for semiconductor applications, with particular emphasis on advanced packaging technologies like hybrid bonding. This position suits experienced engineers with strong backgrounds in materials science or packaging engineering who thrive in complex, collaborative environments and want to drive innovation in semiconductor manufacturing.
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Listed June 30, 2026 · Verify details with the employer before applying.
About Intel
Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.
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