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Silicon Packaging Design Engineer
This engineer will create and refine interposer and bridge layouts, assess substrate and routing options, and support integration across silicon, package, and board design. The work includes using custom layout and place-and-route tools, reviewing design data, resolving DRC issues, and helping establish practical design rules and specifications. The position sits within Intel Foundry’s advanced packaging organization and involves regular collaboration with technology, hardware, and partner teams to meet development milestones. It suits an electrical or computer engineering professional with experience in silicon physical design and an understanding of signal integrity, power integrity, or interconnect reliability. Strong communication, analytical problem-solving, and interest in advanced packaging are valuable for success.
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Listed August 20, 2026 · Verify details with the employer before applying.
About Intel
Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.
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