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Updated daily · Sep 12, 2026
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Senior Analog Design Engineer

IntelPhoenix, AZFull-time$190,610.00-269,100.00 USD

This engineer will work in Intel’s Central Engineering Group on analog and mixed-signal IP supporting client, data center, AI, and foundry products. Responsibilities span circuit architecture, detailed design, simulation, layout coordination, top-level IP integration, and optimization for power, performance, and area. The position leads projects from specifications through silicon bring-up, including test planning, lab characterization, debugging, and design improvement. It also involves guiding junior engineers, partnering with global architecture, verification, physical design, layout, manufacturing, and system teams, and leading technical reviews. The role is well suited to an experienced analog designer with strong high-speed interface expertise, practical validation skills, and the ability to coordinate complex work across disciplines and locations.

Requirements

Bachelor's in Electrical Engineering or related field with 6+ years of analog/mixed-signal circuit design for high-speed SerDesProven expertise in PLL, CDR, CTLE, DFE, ADC, or transmitter/receiver designStrong knowledge of high-speed communication standards (PCIe Gen5/Gen6/Gen7, UCIE)Hands-on experience with FinFET CMOS processes and design tools (Cadence Virtuoso, HSPICE)Demonstrated ability to lead projects, mentor engineers, and work effectively in global cross-functional teamsPost-silicon validation and lab measurement experience with strong problem-solving and debugging skills
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Listed June 30, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.

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