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Principal Collateral Device Engineer

IntelPhoenix, AZFull-time$224,970 - $317,600 USD

The Principal Collateral Device Engineer drives the creation of next-generation device and interconnect technology by designing test chips, optimizing design rules, and developing process monitoring structures for advanced semiconductor nodes. This position sits within Intel's Manufacturing Development and Customer Engineering organization, which is central to Intel's transformation into a foundry service provider. The role requires deep expertise in CMOS device physics, design rule optimization, and data analysis to translate process development into manufacturable solutions that serve both internal teams and external foundry customers. You will lead cross-functional collaborations spanning process integration, yield engineering, device physics, and design teams to solve complex technical challenges in a fast-paced manufacturing environment. This position suits experienced semiconductor engineers who combine strong technical problem-solving with leadership capability and a desire to influence innovation across diverse global teams.

Requirements

Master's degree in Electrical Engineering, Physics, or related field with 15+ years CMOS device engineering experienceExpertise in test chip design, device collateral development, and design rule creation and validationStrong background in device physics, scribe line layout, and design-technology co-optimization (DTCO)Advanced experience with data analysis, scripting, and statistical techniques for process controlDemonstrated ability to lead cross-functional teams and bridge communication between process, device, yield, and design functionsExperience with advanced node design (3nm-16nm FinFET and sub-3nm GAA FET preferred)
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Listed July 1, 2026 · Verify details with the employer before applying.

About Intel

Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.