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Substrate Packaging Research and Development Engineer
This position involves developing and optimizing assembly processes and equipment solutions that support Intel's next-generation packaging technology roadmap. The engineer will work within the Packaging Technology Development organization to design experiments, analyze data, and implement novel manufacturing approaches while maintaining strict quality and reliability standards. The role encompasses process specification development, equipment maintenance for environmental testing, supplier quality management, and collaboration with cross-functional teams on packaging innovations. This position suits engineers with strong fundamentals in materials science, experimental design, and statistical analysis who are eager to drive manufacturing excellence in semiconductor packaging. Success requires both technical depth and the ability to solve complex problems while managing vendor relationships and ensuring manufacturability of advanced package designs. The engineer will contribute to setting reliability requirements and developing techniques to identify potential packaging issues early in the development cycle.
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Listed August 5, 2026 · Verify details with the employer before applying.
About Intel
Four decades of chip manufacturing in Chandler, with the Ocotillo campus among Intel's largest fab sites and ongoing expansion.
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