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Lead Layout Designer II

Microchip TechnologyAZ - Chandler, AZFull-time

The Lead Layout Designer II position focuses on developing block and cell layouts for high-frequency networking connectivity products at Microchip's Chandler facility. The role encompasses floor-planning, custom analog layout design, physical verification, and electromigration analysis for cutting-edge USB and Ethernet standards. You'll collaborate closely with design engineering teams to move custom designs from concept to production while maintaining high technical standards. This position suits experienced layout designers who thrive with autonomy, are eager to master advanced process nodes below 28nm, and excel in fast-paced team environments where you can influence product development at the physical design level.

Requirements

7+ years of custom analog CMOS layout design experienceProficiency with Cadence, Pegasus, and Calibre EDA toolsKnowledge of advanced CMOS processes and foundry design rules (28nm and below)Strong physical verification and electromigration analysis skillsExcellent problem-solving abilities and attention to detailCadence SKILL programming skills preferred
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Listed July 31, 2026 · Verify details with the employer before applying.

About Microchip Technology

Global microcontroller/analog semiconductor maker headquartered in Chandler since 1989.

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