Senior Engineer II - Physical Design

This engineer will join a global DSPIC physical design team developing microcontroller products in advanced FLASH process technologies. The work includes floorplan and power-grid planning, placement, clock implementation, routing, timing closure, signal-integrity analysis, and delivery of final GDSII. The engineer will also improve design methodologies, support test-chip programs, complete DRC/LVS and IR-drop/EM signoff, and implement metal-only changes. Success requires close coordination with synthesis, DFT, IP, CAD, and other international teams to achieve reliable first-pass silicon. The position suits an independent physical design professional with at least five years of hands-on experience, strong EDA and scripting skills, and the ability to lead block- and chip-level implementation activities.