Senior Engineer I- Design

This engineer will create and refine RTL for digital blocks, build verification environments, and drive testing toward functional and code coverage goals. The position supports next-generation mixed-signal and digital products and requires close coordination with architecture, analog, physical design, and software teams. Responsibilities also include running lint, clock-domain crossing, and synthesis checks, resolving issues, and contributing to specifications and design reviews. AI/ML approaches may be used to improve coverage closure, regression performance, and defect analysis. It is well suited to an experienced digital design or verification engineer with strong ASIC fundamentals, programming ability, and interest in productivity-focused methodologies.