Advanced Packaging Integration and Simulation Intern

This intern will support wafer-level, 2.5D, 3D, chiplet, and hybrid-bonding integration efforts within Intel’s advanced packaging research organization. Responsibilities include designing experiments, developing and validating mechanical and thermal simulation models, and analyzing process, inspection, and modeling data to address integration issues. The intern will work with researchers, process engineers, and modeling specialists to optimize materials, process flows, and package architectures. The position is well suited to a PhD student in an engineering, materials, physics, or related STEM field with experience in simulation, laboratory work, statistical analysis, or engineering programming. It also offers exposure to semiconductor packaging technologies and opportunities to present technical findings in a collaborative research environment.