Principal Layout Designer

The Principal Layout Designer will lead the physical design and verification efforts for high-frequency digital interfaces operating up to 10Gbps within Microchip's Networking Connectivity Solutions team. The position encompasses block and cell-level design activities including floor planning, custom layout creation, and performance optimization, alongside rigorous physical verification and design rule compliance checks. The role requires collaboration with design engineering teams to transition custom layouts into production-ready formats while maintaining the highest standards of technical precision. This position suits experienced analog layout professionals who thrive with autonomy, stay current with advanced semiconductor technologies, and excel in fast-paced environments where multiple complex projects converge.