Technical Staff Engineer - Design Implementation

This position sits within the silicon design implementation function and leads methodology development across synthesis, timing closure, power analysis, hierarchical integration, and UPF-based low-power design. The engineer will define timing and constraint strategies from individual IPs through full-chip integration while partnering with physical design teams on floorplanning and clock planning. They will also help shape multi-die implementation practices and assess partitioning choices for their effects on performance, power, yield, and scalability. A significant part of the role involves creating processes that work in first-generation product environments and scaling them across teams. It is suited to a highly experienced SoC implementation leader who is comfortable with industry EDA tools, cross-functional influence, mentoring, and ambiguous technical challenges.